FS SCS, how to detect open circuit in analog signal

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How to detect open circuit or shorted to ground or to supply signal failure ? this article explains how to achieve SCS rule compliance in formula student.

This article is written in a way that people from Formula student team can understand a way to deal with System Critical Signal signal. However it can help anyone that want to detect open circuit or signal shorted to ground or supply voltage in any project.

Key principle and rule

The main goal is to detect a set of different things detailled in the System Critical Signal (SCS) section of the FSG rules :

  1. Failures of signals transmitted by cable:
    • Open circuit
    • Short circuit to ground
  2. Failures of analog sensor signals transmitted by cable:
    • Short circuit to supply voltage
  3. Failures of sensor signals used in programmable devices:
    • Implausibility due to out of range signals, e.g. mechanically impossible angle of
      an angle sensor.
  4. Failures of digitally transmitted signals by cable or wireless:
    • Data corruption (e.g. checked by a checksum)
    • Loss and delay of messages (e.g. checked by transmission time outs)

Today we will only focus on analog signal, defined by a. b. c. . Concerning the c., it needs to be implemented in a specific way but it isn’t really hard to do so (range detection thanks to comparator… ). Today we will focus on detecting Open circuit, Short circuit to ground and short circuit to supply voltage.

Realisation

No more suspense ! To do so we will shift the working point of our sensor or signal from 0V to 5V to 1.2V to 3.8V. After we will only need to detect if our signal is between 0V and 0.75V and between 4.25V and 5V to detect a failure !


Thanks to a really simple circuit we can achieve this.

Design information

Since we want a symmetric design it is pretty easy to calculate resistance constraint :

\( R_1 = R_3 (\frac{V_s}{V_t}-2) \)

This formula is general and will help you design anything you want. Vs is supply voltage and Vt is the lowest voltage you want to target.

Now that we have the circuit that send our SCS compliant circuit, we need to design the other part of the circuit that will detect if everything is fine. The simplest is to use a bi-channel comparator. You need to choose a comparator that will be able to make comparison all the way from 0V to Vs (not Vs-2V like comparator with wide voltage input). It needs also to be open collector. (explaining in the detail)

Theorical detail

On this scheme we aim to close an optocoupler when we respect SCS (Sensor input between 0.75V and 4.25V). When using open-collector comparator we can chain their two output to make a boolean AND (active high logic).

Comparator 1Comparator 2Voltage out
Vin > 0.75VOpen “True / 5V”Open “True / 5V”5V
Vin < 0.75VOpen “True / 5V”Closed “False / 0V”0V
Vin > 4.25VClosed “False / 0V”Open “True / 5V”0V
Vin < 4.25VOpen “True / 5V”Open “True / 5V”5V
Truth table of voltage comparison

Thanks to R6 we are able to detect open-circuit.
After we only need to use our output to control an optocoupler, a relays or anything we want.

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Comments

2 responses to “FS SCS, how to detect open circuit in analog signal”

  1. Charan sai Avatar
    Charan sai

    I have few doubts just listed them below….
    I had gone through both of your blogs related to FSG even I’m part of our college FS team 🙂
    •Why is it open circuited even though the Vin to the sensor is > 4.25 Volts…it is like you are supplying the voltage to your sensor and if it is greater than 4.25 volts then it should treated as closed circuit is what I felt
    •when Vin>0.75 volts and again you are treating it as open circuit why?
    •what exactly is closed circuit means
    (i)Vin to the sensors being >3.8 volts ?
    •how did you get the generalized formula relation between Vs and Vt.

    1. Hi ! thanks for your feedback 🙂 hopes my article helps you !

      Your confusion comes from the actual behavior of a comparator. Even if my explanation is harder to understand rather than seeing only a comparator as “comparison okay -> 5V output”, it is easier in the end to understand why a comparator can be output-chained.

      An open collector Comparator output can be seen as a switch that connects Output and ground if the comparison is wrong. That is why you need to pull-up the output of a comparator through a resistance.

      When the comparison is true the switch stays open so through the pull-up you see 5V at the output of the comparator.
      When the comparison is false, the switch become close and you see Gnd level at the output of the comparator.

      That is why you can chain multiple output without doing short-circuit ! When you do so if any chained comparator is false it will draw voltage to gnd for everyone (leading to a boolean AND in active high logic).

      I will put the demonstration of the formula but it comes from the fact that you can simplify some things thanks to the symmetrical design of the voltage translation.

      If you want to dive more into simulation and understanding of the behavior of each electrical component, I think you would appreciate to read my article about Simulation on kicad ^^.

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